Typically, during materials processing, plasma is employed to facilitate the addition and removal of material films when fabricating composite material structures. For example, in semiconductor processing, a (dry) plasma etch process is utilized to remove or etch material along fine trenches or within vias or contacts patterned on a silicon substrate. Alternatively, for example, a vapor deposition process is utilized to deposit material along fine lines or within vias or contacts on a silicon substrate. In the latter, vapor deposition processes include chemical vapor deposition (CVD), and plasma enhanced chemical vapor deposition (PECVD).
In PECVD, plasma is utilized to alter or enhance the film deposition mechanism. For instance, plasma excitation generally allows film-forming reactions to proceed at temperatures that are significantly lower than those typically required to produce a similar film by thermally excited CVD. In addition, plasma excitation may activate film-forming chemical reactions that are not energetically or kinetically favored in thermal CVD. The chemical and physical properties of PECVD films may thus be varied over a relatively wide range by adjusting process parameters.
More recently, atomic layer deposition (ALD), a form of CVD or more generally film deposition, has emerged as a candidate for ultra-thin gate film formation in front end-of-line (FEOL) operations, as well as ultra-thin barrier layer and seed layer formation for metallization in back end-of-line (BEOL) operations. In ALD, two or more process gases are introduced alternately and sequentially in order to form a material film about one monolayer (or less) at a time. Such an ALD process has proven to provide improved uniformity and control in layer thickness, as well as conformality to features on which the layer is deposited. However, current ALD processes often suffer from contamination problems that affect the quality of the deposited ALD films, and the interfaces between the ALD films and other films in a manufactured device.
The introduction of copper (Cu) metal into multilayer metallization schemes for manufacturing integrated circuits can necessitate the use of diffusion barriers/liners to promote adhesion and growth of the Cu layers and to prevent diffusion of Cu into the dielectric materials. Barriers/liners that are deposited onto dielectric materials can include refractive materials, such as tungsten (W), molybdenum (Mo), and tantalum (Ta), that are non-reactive and immiscible in Cu, and can offer low electrical resistivity. For example, Cu integration schemes for technology nodes less than or equal to 130 nm can utilize a low dielectric constant (low-k) inter-level dielectric, followed by a physical vapor deposition (PVD) of a Ta film or a TaN/Ta film, followed by a PVD Cu seed layer, and an electrochemical deposition (ECD) Cu fill. Generally, Ta films are chosen for their adhesion properties, and TaN/Ta films are generally chosen for their barrier properties (i.e., their ability to prevent Cu diffusion into the low-k film).
The presence of impurities in Ta-containing films can result in weak adhesion between a bulk Cu layer and the Ta-containing films, which in turn can result in electro-migration (EM) and stress migration (SM) problems, as well as reduced device production yields. Thus, new processing methods are needed for improving the properties and integration of Ta-containing films into Cu metallization schemes.